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Consider Figure 2. Given the sequence slt $t0, $al, $a0; beq $t0,$zero, Ll; and given that Ll points to the address 00123450), while the branch
Consider Figure 2. Given the sequence slt $t0, $al, $a0; beq $t0,$zero, Ll; and given that Ll points to the address 00123450), while the branch instruction is at the address 001200007, while registers $al, $a0 hold the values FFFF0101, and FFFF010211, respectively, find: ALLO Add Shit t2 PCS Regut Memed Instruction 1-25 ALUOD Meme ALUS Instructen S-211 Read Instveno-15 Intuosen DI- Read Read Read Reis Read register data 2 urte Zero ALU ALU A cita mer Data memory Whe 16 Inscen 150 levend ALU control houten 54 Figure 2: Single Cycle Datapath 1. The value of the control signals for the second clock cycle of execution. 2. The value of the sign extended immediate for the first clock cycle of execution. 3. The value of Read Data 1 for the second clock cycle of execution
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