Consider running the following code in a 5-stage pipeline where: instruction search: 2 ns decoding / reading of the registers: 3 ns address execution / calculation: 2.5 ns memory access: 4 ns writing the result: 3.5 ns add R5, R6, R7 lw 6, 100 (R 7) sub R7, R6, R8 add R7, R7, 1 sw R6, 100 (R7) How many cycles will be spent if there is data advance? Choose one: A. 11 cycles B. 15 cycles C. 13 cycles D. 10 cycles E. 9 cycles