Consider the $5-$stage pipeline with Fetch, Decode, Execute, Memory Access, Write Back. A forwarding$/$bypassing connection is avai

Consider the following instruction sequence:

i$1$: LDUR X$0,[$X$0,$ #$0]$

i$2$: ADD X$1,$ X$0,$ X$0$

must stall

can execute without stalling or forwarding

can avoid stalls using only forwarding