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Consider the addition of two two-bit numbers (no carry-in). This would have four inputs and three outputs (the two-bit result and a carry-out bit). (a)

Consider the addition of two two-bit numbers (no carry-in). This would have four inputs and three outputs (the two-bit result and a carry-out bit).

(a) Write out the 16-line truth table. (four columns for input, three for output).

(b) Sketch the PLA circuit (using the lines and dot notation).

(c) How many AND-lines (vertical) would be needed for 64-bit addition, including carry-in and carry-out bits. Could this be done on a PLA?

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