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Consider the case of a processor with an instruction length of 4 bits and with 2 general - purpose registers so the size of the

Consider the case of a processor with an instruction length of $4$ bits and with $2$ general $-$ purpose registers so

the size of the address fields is $1$ bit. Is it possible to have instruction encodings for the following?

$3 -$ address instructions

$21 -$ address instructions

$10 -$ address instruction

Impossible

Possible

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