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Consider the circuit shown below, all the transistors have on-resistance of 5k. Assume all the capacitors and the output Y are initially orecharged to Vdd.

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Consider the circuit shown below, all the transistors have on-resistance of 5k. Assume all the capacitors and the output Y are initially orecharged to Vdd. Identify the logic states of the inputs for the worst-case (highest) output fall time, and use Elmore delay method to calculate the output fall time. If it is correct I will give thumbs up! Please don't copy wrong answers! The answer is not 700ps. Thank you in advance! Please show work

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