Question
Consider the execution of the following code in this pipeline. lw $t1, 0($t2) #1 add $t1, $t1, $t3 #2 lw $t3, 0($t1) #3 add $t2,
Consider the execution of the following code in this pipeline.
lw $t1, 0($t2) #1 add $t1, $t1, $t3 #2 lw $t3, 0($t1) #3 add $t2, $t2, $t3 #4
Suppose that, due to a manufacturing defect, the Stall control signal from the Load-Use Hazard Detection unit suffers a stuck-at-0 error. That is, the Stall control signal is always set to 0 regardless of circumstances. Assume that the rest of the hardware operates as designed.
Suppose that, initially, $t1=0x1000, $t2=0x2000, and $t3=0x3000. Suppose that all the memory states are initialized to be 0x0000. Consider the execution of the above code in this buggy pipeline. Determine the final values of the $t1, $t2, and $t3 registers after all the instruction leave the pipeline.
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