Consider the following Boolean functions:

F1( A, B, C) = A . B . C ' + A' . B

F2( A, B, C ) = B . C + A ' . C + A . B . C '

a) Implement F1 and F2 using one 3:8 Decoder module and two OR gates.

b) Implement F1 and F2 using two 4:1 Multiplexers and one optional NOT gate.

c) Implement F1 and F2 using a PLA which has 3 inputs, 2 outputs, and 4 products.