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Consider the following instruction: Instruction: AND Rd , Rs , Rt Interpretation: Reg [ Rd ] = Reg [ Rs ] AND Reg [ Rt

Consider the following instruction:
Instruction: AND Rd,Rs,Rt
Interpretation: Reg[Rd]= Reg[Rs] AND Reg[Rt]
a. What are the values of control signals generated by the control in previous figure1 for the above instruction?
RegWrite:
ALUSrc:
ALUoperation:
MemWrite:
MemRead:
MemToReg:
b. Which resources (blocks) perform a useful function for this instruction?
c. Which resources (blocks) produce outputs, but their outputs are not used for this instruction?
d. Which resources produce no outputs for this instruction?
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