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Consider the following logic expression of F . F ( A , B , C ) = A ' B C + A B '

Consider the following logic expression of F.
F(A,B,C)=A'BC+AB'C', where A is the MSB and C is the LSB.
Answer the following questions:
1)Write the truth table of F
2)Synthesize the logic expression of F using AND/OR/NOT gates.
3) Transform the logic network found in part (2) to an all-NAND gate network. Note: You must use the NAND gate to design the NOT functionality.
4) Write the Verilog code that describes F using structural representation.
5) Rewrite the Verilog code using the assign statement.
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