Question
Consider the following MIPS code. Assume register R0 is always 0. ADDI R1, R0, #2 L1: ADDI R12, R0, #4 L2: SUBI R12, R12, #1
Consider the following MIPS code. Assume register R0 is always 0.
ADDI R1, R0, #2
L1: ADDI R12, R0, #4
L2: SUBI R12, R12, #1
BNEZ R12, L2 -- Branch 1
SUBI R1, R1, #1
BNEZ R1, L1 -- Branch 2
Each table below refers to only one branch. For instance, branch 1 will be executed 8 times. Those 8 times should be recorded in the table for branch 1. Similarly branch 2 is executed only 2 times.
Compare the branch accuracy for 1-bit and 2-bit branch predictors for the above code. Branch accuracy is defined as number of correct predictions divided by total number of branches. When the processor starts to execute the above code, both predictors contain value N (Not taken). Use the following tables to record the prediction and action of each branch. What are the values of R1 and R12 when the tables are filled up?
1-bit predictor scheme
Step | Branch 1 Prediction | Branch 1 Action | Branch 2 Prediction | Branch 2 Action |
1 |
|
|
|
|
2 |
|
|
|
|
3 |
|
| N/A | N/A |
4 |
|
| N/A | N/A |
5 |
|
| N/A | N/A |
6 |
|
| N/A | N/A |
7 |
|
| N/A | N/A |
8 |
|
| N/A | N/A |
2-bit predictor scheme
Step | Branch 1 Prediction | Branch 1 Action | Branch 2 Prediction | Branch 2 Action |
1 |
|
|
|
|
2 |
|
|
|
|
3 |
|
| N/A | N/A |
4 |
|
| N/A | N/A |
5 |
|
| N/A | N/A |
6 |
|
| N/A | N/A |
7 |
|
| N/A | N/A |
8 |
|
| N/A | N/A |
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