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Consider the following MIPS code. Note that R 0 ( register 0 ) in the MIPS ISA always has a value of zero. Assume that
Consider the following MIPS code. Note that Rregister in the MIPS ISA always has a value of
zero. Assume that the branch is the first instruction executing after a jump.
a Convert the MIPS code into C:
b How many branch misspredictions occur during this code's execution, if we use an
alwaystaken predictor?
Explain you answer:Consider the following MIPS code. Note that Rregister in the MIPS ISA always has a value of
zero. Assume that the branch is the first instruction executing after a jump.
x li R # v
x li R # Loop bound for LoopJ
x li R # j
LoopJ:
xC beq RREndLoopJ # Exit LoopJ if j
x li R # k
LoopK:
x beq RREndLoopK # Exit LoopK if k
x add RRR # ki
xC andi RR # kj
x bne RREndIf # Skip if kj
x add RRR # vk
EndIf:
x addi RR # k
xC beq RRLoopK # Go back to LoopK
EndLoopK:
x addi RR # j
x beq RRLoopJ # Go back to LoopJ
EndLoopJ:
a Convert the MIPS code into C:
b How many branch misspredictions occur during this code's execution, if we use an
alwaystaken predictor?
Explain you answer
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