Consider the following processes in the main memory and fill in the blanks in CPU's instruction

register

$($

please also give the total number of context switches

$)$

$.$

$$This CPU can handle

$100$

instructions in

$1$ms

; Process A and

B

$$are equally important.

Case#

$1$

: System timer is set to

$2$ms

;

Case#

$2$

: System timer is set to

$20$ms

;Case#$3$: System timer is set to $20ms$; a hardware interrupt is detected after $3ms$