2.   

Consider the following sequence of 8 instructions for the pipelined MIPS. Assume the pipeline is initially empty. There is an enlarged figure on the last page which you will have to use for some of the questions. lw $t0, 0($sp) lw $t1, 4($sp) lw $t2, 8($sp) addi $t2, $t0, 1 add $t1, $t1, $t2 add $to, $to, $t1 sw $t0, 0($sp) sw $t1, 4($sp) 2. List all hazards and their types in this code, if any. For each hazard, say how it will be addressed/fixed (i.e. forwarding, stalling, something else, etc...). 3. Given your answer in part 2 above, how many actual clock cycles are needed to push these instructions through the CPU?