Question
Consider the following truth table: A B C D F G 0 0 0 0 1 1 0 0 0 1 0 0 0 0
Consider the following truth table:
A B C D F G
0 0 0 0 1 1
0 0 0 1 0 0
0 0 1 0 1 1
0 0 1 1 0 0
0 1 0 0 1 0
0 1 0 1 1 0
0 1 1 0 1 0
0 1 1 1 0 0
1 0 0 0 0 1
1 0 0 1 0 1
1 0 1 0 0 1
1 0 1 1 0 1
1 1 0 0 1 1
1 1 0 1 1 1
1 1 1 0 0 1
1 1 1 1 0 1
a) Construct Karnaugh maps and identify minimal SOP expressions for F and G.
b) Implement F using an 8-to-1 MUX and NO EXTERNAL LOGIC.
c) Determine the minimal POS expression for G, and then use this expression to implement G using 2-input NOR gates.
d) Implement G using a 4-to-1 MUX and NO EXTERNAL LOGIC.
e) Implement G using a 3-to-8 Decoder and one OR gate. Assume that the decoder outputs are active HIGH. (The OR gate may have an arbitrarily large number of inputs.)
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PART TWO: Adders
Design a combinational circuit that uses 4-bit adders and XOR gates to subtract two signed 4-bit 2s-complement binary numbers, producing a signed 8-bit 2s-complement result. For example, if A = 0001 (+1) and B 1000 (-8), A - B = 0000 1001 (+9).
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