Consider the ring oscillator circuit shown in Figure $1$ below.

Figure $1.$ Ring oscillator for Problem $1,$ part $($a$).$

The ring oscillator considered in this problem generates a square wave output with $50\%$ duty cycle, and can be used as a clock generator. For this problem, consider that the delay of each inverter is $50$ ns $.$ Answer the following:

a$)$ For the ring oscillator as shown in Figure $1,$ with three inverters in the ring, determine the output frequency $f_{\text{e}\text{l}\text{k}}$ in Hz $.$ Represent your answer in proper engineering notation format with correct units; i$.$e$.,$ the number to the left of the decimal place should be between $1$ and $999,$ keep at least two decimal places of precision to the right of the decimal place, and the units should be listed with the appropriate engineering prefix $($e$.$g$.,$ k$,$ M$,$ G$,$ T$,$ etc.$)$; for example, if you compute $f_{clk}$ as $4566234\mathrm{.}5678$ Hz $,$ then this should be reported in proper engineering notation format as $4\mathrm{.}57$ MHz $.$ Box your final numerical answer and show your work.

b$)$ Suppose you want to design a ring oscillator with an output frequency which is half that reported in part $($a$)$ using the same inverters with a delay of $50$ ns $.$ Can this be accomplished by using six inverters in the ring instead of three? Either explain $($i$)$ why this will work or $($ii$)$ why this will not work, and if it will not work, explain what will happen instead. Provide clear, convincing, and concise technical rationale for why you chose the answer you did.