Consider the same 4-bit addition . If they are applied to unsigned and signed (2's complement) integers respectively, which situations would trigger an overflow?

-	0110 + 0010
-	1001 + 1010
-	1101 + 0001

1011 + 0110

A.	No overflow (neither signed nor unsigned)
B.	Both signed and unsigned overflow
C.	Only unsigned overflow would occur
D.	Only signed overflow would occur