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Consider two different implementations of the same instruction set architecture. The instructions can be divided into four classes according to their CPI (class A, B,

Consider two different implementations of the same instruction set architecture. The instructions can be divided into four classes according to their CPI (class A, B, C and D). P1 with a clock rate of 3GHz and CPIs of 3, 2, 1, 4, and P2 with a clock rate of 2.5GHz and CPIs of 2, 2, 2, 2.

Given a program with a dynamic instruction count of 1.0E5 instructions divided into classes as follows: 20% class A, 40% class B, 30% class C, and 10% class D.

a) Which implementation is faster?

b) What is the global CPI for each implementation?

c) Find the clock cycles required in both cases?

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