Could someone explain how I got this wrong? Thanks in advance.

What are the status of the following CMOS gates when both inputs A and B are 1s? 1 2 N2 1 GND P1-off, P2-on, N1-on, N2-off P1-off, P2-off, N1-on, N2-on P1-on, P2-on, N1-off, N2-off P1-on, P2-off, N1-off, N2-on What is the logic gate for the following CMOS gates? V. P3 2 1 2 3 GND GND NOR gate AND gate NAND gate OR gate