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CprE 381 Homework 2 [Note: This homework gives you practice with MIPS assembly language. When you are asked to provide a program, try running it

CprE 381 Homework 2

[Note: This homework gives you practice with MIPS assembly language. When you are asked to provide a program, try running it on SPIM/MARS to confirm it works. SPIM/MARS can also check your understanding of code tracing, etc. Plus you get more practice with the tools.]

1. MIPS Control Flow

a. Assume $t0 holds the value 0x10000000 and $t1 holds the value 0xFFFFFFFF. What is the value of $t2 after the following instructions? sltiu $t2, $t0, $t1 bne $t2, $0, SMALL addiu $t2, $t1, 1 j EXIT SMALL: add $t2, $t2, $t1 EXIT:

b. Translate the following C-style loop into MIPS assembly, assuming a is in $s0, c is in $s1, i is in $s2, and N is in $s3. How many instructions are executed if N=0, N=1, N=5, N=100, N=1000? for (i=1; i<=N; i++) { a[i] = c[3*i]; }

c. Write MIPS assembly for the following switch statement (from the Linux kernel coding style documentation: https://01.org/linuxgraphics/gfxdocs/drm/process/coding-style.html). Assume suffix is in $a0 and mem is in $a1. switch (suffix) { case 'G': case 'g': mem <<= 30; break; case 'M': case 'm': mem <<= 20; break; case 'K': case 'k': mem <<= 10; /* fall through */ default: break; }

2. MIPS Assembly Language Design

a. P&H(2.21) <2.6>. Provide a minimal set of MIPS instructions that may be used to implement the following pseudoinstruction [Weve talked about pseudoinstructions before with mov. Effectively they are assembly instructions that arent actually in the ISA of hardware, so the assembler has to translate them into another machine instruction or series of machine instructions.]: not $t1, $t2 // bit-wise invert

b. You are tasked with adding a new pseudoinstruction that takes the twos complement of a registers value: ttc $t1 // takes the twos complement of $t1 Give a minimal implementation. Should this instruction produce any exceptions (i.e., can it produce any errors)? If so, what are they and does your implementation handle them?

c. Why does MIPS not have blt, blte, bgt, etc. instructions in its ISA? Provide a technical justification.

3. MIPS Programming [I suggest you actually simulate these programs using SPIM/MARS to confirm that they work.]

a. Write a simple C code snippet that implements the strcpy function from string.h (http://www.cplusplus.com/reference/cstring/strcpy/): char * strcpy ( char * destination, const char * source );

b. Translate your answer to part a into MIPS assembly. Assume that destination is in $a0 and source is in $a1. All other variables in your C code should be initialized within your code. [Note that you are not asked to implement this as a procedure, just as a code snippet.]

c. Provide three reasonable test cases for your MIPS assembly and justify why you have included each one.

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