(d) We have a virtual memory system that has a physically-indexed, physically tagged cache. A memory reference can encounter three different types of misses: a TLB miss, a page fault and a cache miss. Consider all possible combination of these three events with one or more occurring. For each possibility, state whether this event can actually occur and under what circumstances. [5 points] (d) We have a virtual memory system that has a physically-indexed, physically tagged cache. A memory reference can encounter three different types of misses: a TLB miss, a page fault and a cache miss. Consider all possible combination of these three events with one or more occurring. For each possibility, state whether this event can actually occur and under what circumstances. [5 points]