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data 4. For this question, ignore pipelining and assume fetch and execute happen together. An ARM controller fetches & executes the following two 2 16-bit
data 4. For this question, ignore pipelining and assume fetch and execute happen together. An ARM controller fetches & executes the following two 2 16-bit instructions (hex machine code) in the order shown: Ox57A0 OxD288 After execution of these two instructions, the PC holds Ox0001.020A. Given these events, sketch the instruction memory that must have existed for these two instructions by defining the memory address and value for each hex machine code byte. Note that ARM instruction fetches are little endian. You can fill in the relevant blanks in the figure on the right or create your own similar sketch. address 0x0001. Ox0001. 0x0001. 0x0001. Ox0001. 0x0001. cell (1 byte) 8-bit memory
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