Describe the circuit that you programmed for this lab. o What does it do? Does it seem to work correctly? o How many digital inputs and outputs does it have? o Could it be made more efficient? If so, how? Overview: In this lab, we will be creating a VHDL description of a seven-segment decoder, and implementing this on a BASYS2 FPGA development board ("dev board.") A seven- segment decoder takes a four-bit input and produces seven output signals - one for each of the LEDs in a seven-segment numerical display. With the correct definition, this decoder will translate the binary input combinations 0000, 0001, 0010 ... 1101, 1110, 1111 into sixteen combinations of output signals ("a" through "g") which will produce the correct visible digits on the built-in seven-segment display. For example, when presented with the input "0111," the circuit should light up the LEDs at the top, top right, and bottom right of the display to produce a visible "7". The resulting circuit will implement seven four-variable Boolean functions. Six of these will be provided for you, in the interest of saving time. You will determine and construct the seventh function (for the center LED segment: "g.") The connections for the input switches and seven-segment display, hard-wired into the BASYS2 dev board, are shown in the BASYS2 board manual (see PDF.) The manual also shows the designation scheme for the seven segments. Therefore, the VHDL code for Segment A is: temp_a