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Design a component shifter to implement the MIPS-32 instructions sll and srl with the following entity description: entity shifter is port(X: in std_logic_vector(31 downto 0);

Design a component shifter to implement the MIPS-32 instructions sll and srl with the following entity description:

entity shifter is

port(X: in std_logic_vector(31 downto 0); SHAMT:in (std_logic_vector(4 down to 0);

LR: in std_logic; - - LR=0 shifts left and LR=1 shifts right

Y:out std_logic_vector(31 downto 0));

end shifter;

Note that the VHDL predefined functions sll and srl work only for the bit type and not the std_logic type. You will have to find another way to code them.

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