Design a digital logic circuit as a Read Only Memory (ROM) [Decoder plus OR gates]. A ROM accepts a three-bit number (22x170) and generates an output binary number equal to the input squared + 2. A = +2, with input (a): 0 (x) 7 (a) Set-up the truth-table [Binary inputs: (r); Binary outputs: .... A2, A1, A0] (b) What is the size of the initial (unsimplified) ROM? (c) What is the size of the final (simplified) ROM? (d) Show in detail the final memory layout. decimal 2 I1 Io 0 0 0 1 0 123 1 57 4 - 5 6 0 0 1 0 1 0 1 1 1 1 0 1 0 1 A Ao