Design a logic module that can sound the alarm if the alarm switch is turned on and the door is not closed, or it is after 6pm and the window is not closed.

• Write the Boolean expression (prove with truth table)
• Apply simplification rule with simplified Boolean expression (prove with truth table) if applicable
• Draw the circuit diagram with gates.
• Write a Verilog module and test branch logic; using gate level statement
• Write a VHDL architecture and test branch logic ; using dataflow level statement