Design a processor with Harvard architecture with the following specifications: 1 - There are 16 32-bit registers in the register bank. What will be the size of read reg1, read reg2, and write register ports in the given picture? (3 points) 2- Choose a data-bus size and give your rationale for your choice (2 points) 3- Assume there are two sets of instructions with the size of 16 bits and 24 bits, choose an instruction-bus size. Give your reasons for your choice. (2 points) 4- Assume you want to connect a 16 KB byte-addressable memory as data memory, how many bits you need to address the memory locations? Show your calculations. (4 points) 5- Assume you have 20 bits available to address the instruction memory, what will be the maximum size of a bit-addressable memory that can be connected to this processor. Calculate the memory capacity in byte. (4 points) 6- Assume that you want to design two sets of instructions for this processor: 6.a The first set is made of 64 instructions, each one is 16 bits, and they can only have access to the first 8 registers, what will be the size of the fields for these instructions. Instruction fields are: opcode, Rds, Rs, imm (4 points) noond set is made of 128 instructions, each one is 3 bytes, and they can have these instructions. Instruction 6- Assume that you want to design two sets of instructions for this processor: 6.a The first set is made of 64 instructions, each one is 16 bits, and they can only have access to the first 8 registers, what will be the size of the fields for these instructions. Instruction fields are: opcode, Rds, Rs, imm (4 points) 6.b The second set is made of 128 instructions, each one is 3 bytes, and they can have access to all 16 registers, what will be the size of the fields for these instructions. Instruction fields are opcode, Rd, Rs2, Rs1, imm (4 points) 6.c Which value must be added to the program counter to point at the next instruction in parts 6.a, and 6.b, assuming that the instruction memory is byte-addressable. (3 points) Write reg Read reg2 Write reg Read reg2 Read reg1 Register bank ALU data Memory Design a processor with Harvard architecture with the following specifications: 1 - There are 16 32-bit registers in the register bank. What will be the size of read reg1, read reg2, and write register ports in the given picture? (3 points) 2- Choose a data-bus size and give your rationale for your choice (2 points) 3- Assume there are two sets of instructions with the size of 16 bits and 24 bits, choose an instruction-bus size. Give your reasons for your choice. (2 points) 4- Assume you want to connect a 16 KB byte-addressable memory as data memory, how many bits you need to address the memory locations? Show your calculations. (4 points) 5- Assume you have 20 bits available to address the instruction memory, what will be the maximum size of a bit-addressable memory that can be connected to this processor. Calculate the memory capacity in byte. (4 points) 6- Assume that you want to design two sets of instructions for this processor: 6.a The first set is made of 64 instructions, each one is 16 bits, and they can only have access to the first 8 registers, what will be the size of the fields for these instructions. Instruction fields are: opcode, Rds, Rs, imm (4 points) noond set is made of 128 instructions, each one is 3 bytes, and they can have these instructions. Instruction 6- Assume that you want to design two sets of instructions for this processor: 6.a The first set is made of 64 instructions, each one is 16 bits, and they can only have access to the first 8 registers, what will be the size of the fields for these instructions. Instruction fields are: opcode, Rds, Rs, imm (4 points) 6.b The second set is made of 128 instructions, each one is 3 bytes, and they can have access to all 16 registers, what will be the size of the fields for these instructions. Instruction fields are opcode, Rd, Rs2, Rs1, imm (4 points) 6.c Which value must be added to the program counter to point at the next instruction in parts 6.a, and 6.b, assuming that the instruction memory is byte-addressable. (3 points) Write reg Read reg2 Write reg Read reg2 Read reg1 Register bank ALU data Memory