Design and simulate a combinational circuit Using Quartus Il simulator. Your design must read 4-bit BCD and convert it to 2421 number system. The input of the circuit will be x3 x2 x1 XO and the output f3 f2 f1 fo. Your design must include: 7. The truth table of the design 8. Finding SOP and POS. 9. Minimizing SOP and POS using truth table 10. Finding the cost 11. Choose the minimum design cost and implement it using Verilog 12. Verify your design with waveform What you need to submit 3. Short report including the summary of the question (problem statement) the design of the circuit (cover-page, truth table, functions k-maps Verilog code and screen shot of the waveform and conclusion. 4. Quartus complete design Explanation of the code convertor BCD-to-2421 The BCD numbering system is the presentation of the digits from 0-9 in 4-bit binary. For example, I will be presented as 0000, 2 will be presented as 0010 and 9 will be presented as 1001 The 6211-numbering system is a weighted code where its weights are 5, 2, 1 and 1. A decimal number is represented in 4-bit form and is calculated according to the weights as 2+ 4 + 2 + 1. Example: The bit assignment 1111, can be seen by its weights to represent the decimal 9 because: 1x5 + 1x2 + 1x1 + 1x1