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Design Requirements Design a register file of four 4-bits registers; R0,R1,R2, and R3 The following shows the top-level organization of this system Function Table Where

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Design Requirements Design a register file of four 4-bits registers; R0,R1,R2, and R3 The following shows the top-level organization of this system Function Table Where - Rd identifies the destination register; R0=00,R1=01,R2=10 and R3=11 - Rs identifies the source register; R0=00,R1=01,R2=10 and R3=11 - The CLR button clears (asynchronously) all registers

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