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DIGITAL CLOCK USING JK FLIP FLOPS COUNTERS.. IT SHOULD ALSO INCLUDE STATE MACHINE AND SEVEN SEGMENT DISPLAY WITH EXPLLANATION. IT WILL ALSO INCLUDE A DECODER/GATE

DIGITAL CLOCK USING JK FLIP FLOPS COUNTERS.. IT SHOULD ALSO INCLUDE STATE MACHINE AND SEVEN SEGMENT DISPLAY WITH EXPLLANATION. IT WILL ALSO INCLUDE A DECODER/GATE LEVEL.

Design a digital clock according to the following specifications: The clock will display time in the standard 12 hour format HH:MM with an indicator for AM/PM. Your clock will use a 7-segment display unit.

The project must include:

1. A black box style design of the clock control unit and display as an overview.

2. Each part of the control unit should show the circuit design, including the state machine, state tables, flip-flop design and simplifications.

3. The implementation for the display unit should be specified (gate level / decoder)

4. The design of the unit should be clearly labelled and the connection(s) between components should be clearly marked.

5. A document explaining your implementation and the connections between components must be included. You may choose the flip-flops and the 7-segment implementation, but all details of the implementations must be included in the documentation and in the final design of the clock unit.

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