do Nand and nor

Minimized: F1 = A B D + B C D + A' B D'; F2 = AB + B C D + B C D'; F3 - A B C + A' B C + A' C D; F4 = A B C + B C D' + A' C D': Minimized Product of Sums: F1 = (B'+C+D') (A' +B'+C') (A+B+C) (B+D) : E2 - (B'+C+D') (A' +B'+C') (A+D') (A+B+C); F3 - (B'+C+D') (B+C) (A' +B'+C) (A+B+D) : F4 = (B'+C+D') (B+C) (A' +B'+C') (A+D'); Design the switching functions using minimal NAND gates only. Design the switching functions using minimal NOR gates only. Design the switching functions using minimal PLA. Design the switching functions using a ROM