DQuestion 7 5 pts Given a virtual memory system with the following specification: The memory is byte addressable Each memory access is to 1-byte word. Each virtual address is 16-bit wide. Each physical address is 12-bit wide. The page size is 32 bytes (2) The TLB is 2-way set associative with 16 total entries The L1 data-cache is physically addressed and direct mapped, with a 4 byte line size and 16 total sets. The current states of the TLB and the page table are available here You can also look under "Files" for "tables-1.pdf. If the CPU issues a virtual address Ox01D6: Do we have a TLB hit? ISelect ] Do we have a page fault? Select What is the physical address? I Select ] 2-way Set Associative TLB Set IndexTaq PPN ValidTaqPPN Valid Way 0 Way 1 03 03 2D 02 07 09 OD1 02 08 03 OD1 07 01 0A 01 01 0 0 04 06 OA 34 Page Table (first 16 PTEs VPN PPN 28 03 Valid 02 03 16 02 07 13 17 09 2D 0D