Draw the detailed block diagram $($logic diagram$)$ of an $8088-$microprocessor CPU module operated in minimum mode with a $16K$ x $8$ ROM using $8K8$ ROM devices, with writable memory of the same capacity as that of ROM. The system bus is fully buffered using octal latch buffers and transceivers. The IO devices are composed of a PPI and a PIT. $($Show the Memory Address Allocation Table and the Decoding Table. tmplement the decoder using a $38$ decoder$($s$)).$