Draw the logic diagram of a 4 bit register with 4 D flip flops and four 4x1 MUX with mode selection input S1 and S0. The register operates according to the following function table:

S1 S0 | Register Operation 0 0 | No change 0 1 | Complement the four outputs 1 0 | Clear Register to 0 1 1 | Load parallel data