We ran hundreds of different applications and generated the following table: Instruction Type ALU Load Store Branch Frequency of use (%) Cycles to Execute 50% 1 30% 4 10% 10% 3 10 A chief designer says that they propose a large register file inside the processor. With the help of this register file half of the load instructions and half of the store instructions are eliminated. Unfortunately, the newly designed large register file is in the critical path of the CPU, and the clock cycle time has to be 1.3 times longer. Do you think this optimization improves the performance of the processor? Show your calculations.