"Each of the two processors $($P$1$ and P$2)$ in a dual$-$processor system has a sepa XJ$14$ rate data cache and both processors share a single $4294967296-$byte data memory. P$1$s data cache and P$2$s data cache each contains $131072$ lines and each cache line is $256$ bytes in size. P$1$s data cache has a one$-$way set associative organization, but P$2$s data cache has a $4-$way set associative organization.

P$1$ experiences a data cache miss when it first attem to read a data word from memory block $2928610.$ Once the required memory block is brought into P$1$s data cache, its MESI state is changed from I to S because P$2$s data cache already contains a copy of the memory block.

a$)(4)$ Into which line within P$1$s data cache should the memory block be loaded?

b$)(4)$ Which set within P$2$s cache contains the shared memory block?

c$)(3)$ What is the number of tags required for P$2$s entire data cache?

d$)(3)$ How many bits are required for a single tag for P$2$s data cache?

e$)(3)$ What is the number of tags required for P$1$s entire data cache?

f$)(3)$ How many bits are required for a single tag for P$1$s data cache?"