ECE 275: HW#5 (due Tuesday October 30) Question 1 is worth 4 points and the rest are worth 2 points each, for a total of 16 points. Show your work, and check your answers ) Design a minimal implementation of the following 4-bit comparator: A(3.0) B(30)comparator 2) Write the expression for the following circuit in min imal SOP fomat. 4-bit F(1:0) IfA> B F-10 F 1 1 is undefined Z. o" Implement the following function using an 8-to-1 MUX, where w, x, and y are connected to the select lines, S, Si,So, respectively: fw,x, y, z) m(2,4,5, 8, 10, 11, 15) 4) Construct a 16:1 MUX using only 2:1 MUXes. 5) Is a 2:1 MUX a complete logic set? Explain. 6) Implement the following function using NAND-NAND logic (i.e, use Demorgan's Law on the SOP equation; gates other than NAND can be used to achieve the maximum speed 3 gate delay design) f-ABAC BCCD+AD, assuming maximum 4-input gates. The resulting circuit should have 3 gate delays. 7) Design the follow ing circuit for 2 Complement addition/subtraction, using FAs, HAs, and additional logic as necessary if add/sub-0 then F(6:0) A(5:0) +B(3:0); else F(6:0 A(S:0)-B3:0)