Question
EE 4243 Computer Organization and Architecture Bonus Homework for Question 1 of 3 Due on 4/27/2017 For the following single-cycle processor, fill the table of
| EE 4243 Computer Organization and Architecture
Bonus Homework for Question 1 of 3
Due on 4/27/2017 |
For the following single-cycle processor, fill the table of signal values for each instruction below. The values of registers and memory are given in the table below. You may leave a cell blank if it is not used for the given instruction. Instruction and register encoding is given below.
|
|
Instruction encoding
| Mnemonic | OP code | Function code | Type |
| and | 0x00 | 0x24 (1001002) | R |
| or | 0x00 | 0x25 (1001012) | R |
| lw | 0x23 | N/A | I |
| addi | 0x08 | N/A | I |
Register encoding
| Register name | Register number | |
| $0 | 0 | 0x00 |
| $at | 1 | 0x01 |
| $v0-$v1 | 2-3 | 0x02-0x03 |
| $a0-$a3 | 4-7 | 0x04-0x07 |
| $t0-$t7 | 8-15 | 0x08-0x0F |
| $s0-$s7 | 16-23 | 0x10-0x17 |
| $t8-$t9 | 24-25 | 0x18-0x19 |
| $k0-$k1 | 26-27 | 0x1A-0x1B |
| $gp | 28 | 0x1C |
| $sp | 29 | 0x1D |
| $fp | 30 | 0x1E |
| $ra | 31 | 0x1F |
| Signal | (a) | (b) |
| PC | 0x00001000 | 0x00001004 |
| RD of Instruction Memory |
|
|
| A1 of Register File |
|
|
| A2 of Register File |
|
|
| A3 of Register File |
|
|
| SrcA of ALU |
|
|
| SignImm |
|
|
| SrcB of ALU |
|
|
| ALUResult |
|
|
| ReadData |
|
|
| WriteData |
|
|
| Result |
|
|
| PCBranch |
|
|
| MemtoReg |
|
|
| MemWrite |
|
|
| Branch |
|
|
| ALUSrc |
|
|
| RegDst |
|
|
| RegWrite |
|
|
Step by Step Solution
There are 3 Steps involved in it
Step: 1
Get Instant Access to Expert-Tailored Solutions
See step-by-step solutions with expert insights and AI powered tools for academic success
Step: 2
Step: 3
Ace Your Homework with AI
Get the answers you need in no time with our AI-driven, step-by-step assistance
Get Started
Advances In Knowledge Discovery In Databases
Authors: Animesh Adhikari, Jhimli Adhikari
1st Edition
3319132121, 9783319132129
