ELECTRICAL AND ELECTRONICS ENGINEERING

&

COMPUTER ENGINEERING

E E E $248|$ C N G $232$

Logic Design

S P R I N G $23|24$

PROJECT $2$

Good Luck

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L o g i c D e s i g n

P R O J E C T $2$

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TABLE OF CONTENTS

REGULATIONS $3$

EXPERIMENT #$24$

$2\mathrm{.}1$ OBJECTIVE $4$

$2\mathrm{.}2$ PRELIMINARY WORK $5$

$2\mathrm{.}2\mathrm{.}2$ Objectives $5$

$2\mathrm{.}2\mathrm{.}3$ Creating the Functional Unit $5$

$2\mathrm{.}2\mathrm{.}3\mathrm{.}2$ Shift Resisters $5$

$2\mathrm{.}2\mathrm{.}3\mathrm{.}3$ Parallel in Parallel out shift register $6$

$2\mathrm{.}2\mathrm{.}4$ CCU $7$

$2\mathrm{.}3$ DATAPATH DESIGN $8$

$2\mathrm{.}4$ DATAPATH TESTBENCH DESCRIPTION $10$

$2\mathrm{.}4\mathrm{.}3$ For the Temperature Setting: $10$

$2\mathrm{.}4\mathrm{.}4$ For the Humidity Setting: $10$

$2\mathrm{.}5$ TOP$-$LEVEL DESIGN $11$

$2\mathrm{.}6$ PROJECT REPORT $11$

$2\mathrm{.}6\mathrm{.}3$ TESTBENCH $11$

$2\mathrm{.}7$ EXPERIMENTAL WORK $11$

$2\mathrm{.}7\mathrm{.}3$ Experimental Setup $11$

$2\mathrm{.}7\mathrm{.}4$ EVALUATION $11$

$2\mathrm{.}8$ REFERENCES $11$

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REGULATIONS

$$ Students are not permitted to perform an experiment without doing the preliminary work before coming to

the laboratory.

$$ It is not allowed to do the preliminary work at the laboratory during the experiment.

$$ Students, who do not turn in the complete preliminary work printout at the beginning of the laboratory session,

cannot attend the lab. No $$make$-$up$$ is given in that case.

$$ No food or drink in the lab.

$$ Only the following excuses are valid for taking lab make$-$up:

$1.$ Health Make$-$up: Having a health report from METU Medical Center.

$2.$ Exam Make$-$up: Having an exam coinciding with the time of the laboratory session. The student needs

to notify the instructor in advance if this is the case.

$$ Experiments will be done in teams of two.

$$ Cheating or plagiarism is not tolerated. Plagiarism is a form of cheating as is using someone else$$s written

word with minor changes and no acknowledgement. If you are caught cheating or plagiarising, you will at the

very least receive a zero for the whole experiment. Disciplinary action may be taken.

$$ Students who miss the lab two times without a valid excuse get zero as the laboratory portion of the course

grade.

$$ Those who fail to get a satisfactory score from the laboratory portion may fail the class. This score is

expected to be $70\%$ but may be adjusted up or down with the initiative of the course instructor.

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L o g i c D e s i g n

P R O J E C T $2$

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EXPERIMENT #$2$

$2\mathrm{.}1$ OBJECTIVE

In this project, you are required to design and implement a Datapath for a $4-$bit Smart Climate Control

System. Altera toolset and Modelsim$$ will be used to code, simulate, and implement the design.

Students should prepare and submit a report before the LAB demo including all the codes, diagrams, and

simulation waveforms that they will demonstrate for experiment mentioned below.

In this Experiment the Datapath design will be demonstrated with your partner to the LAB instructor as

usual. The report must include all the module designs and simulations. Also, you'll need to test the overall

Datapath design $($the complete setup$)$ in Modelsim$$ using inputs similar to what the Finite State Machine

$($FSM$)$ will provide in the upcoming project. However, for this particular project, follow the instructions

provided in the manual for feeding inputs.

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$2\mathrm{.}2$ PRELIMINARY WORK

A data path is a collection of functional units such as arithmetic logic units $($ALUs$)$ or multipliers that perform

data processing operations, registers, and buses. Along with the control unit it composes the central processing

unit $($CPU$).$ This lab introduces the concept of data path.

$2\mathrm{.}2\mathrm{.}2$ Objectives

After completing this lab, you will be able to:

$$ Create the Functional units through hierarchical design

$$ Understand the working of the CCU

$2\mathrm{.}2\mathrm{.}3$ Creating the Functional Unit

A data path comprises various elements, such as decoders linked to logical gates, facilitating the storage of

values in registers. Subsequently, these registers transmit data to the Central Control Unit $($CCU$),$ where

operations are executed based on specified opcodes. The resultant data is then stored in registers. This process

entails the design of data paths using modular units, which are combined to form a complete data path, termed

as hierarchical design. Establishing a simple hierarchical design aids in project development, as exemplified by

the construction of a $4-$bit shift register below.

$2\mathrm{.}2\mathrm{.}3\mathrm{.}2$ SHIFT RESISTERS

Flip flops have the capability to retain a solitary binary digit, either a $"1"$ or a $"0".$ However, for the storage of

numerous binary digits, multiple flip flops are required. Since each flip flop is designed for the storage of one

binary digit, a series of n flip flops are interconnected to accommodate n bits of data. In digital electronics, a

Register serves as a mechanism employed for data storage purposes.

Below is an illustration of a D$-$flip flop alongside a sample module:

Figure $1$: D$-$Flip Flop

module d$\_$ff $($Data$,$clk$,$Q$)$;

input D$,$clk;

output reg