Exercise 2.32 Determine the propagation delay and contamination delay of the circuit in Figure 2.83. Use the gate delays given in Table 2.8. Exercises Table 2.8 Gate delays for Exercises 2.32-2.35 Gate Epd (ps) 1. (ps) NOT 15 10 2-input NAND 20 15 3-input NAND 30 25 2-input NOR 30 25 3-input NOR 45 35 2-input AND 30 25 3-input AND 40 30 2-input OR 40 30 3-input OR 55 45 2-input XOR 60 40 103/561 Exercise 2.24 A circuit has four inputs and two outputs. The inputs, A3:0, repre- sent a number from 0 to 15. Output P should be TRUE if the number is prime (0 and 1 are not prime, but 2, 3, 5, and so on, are prime). Output D should be TRUE if the number is divisible by 3. Give simplified Boolean equations for each output and sketch a circuit