Exercise 3: (20 pts) Answer each of the following questions a) Suppose that in 1000 memory references there are 40 misses in L1 cache and 10 misses in L2 cache. If the miss penalty of L2 is 200 clock cycles, hit time of L1 is 1 clock cycle, and hit time of L2 is 15 clock cycles, Find the average memory access time in clock cycles. b) Consider a 32-byte cache with 16 byte blocks, an associativity of 4 and LRU block replacement. The processor has 128KB of physical memory. What is the total number of tag bits in the cache? c) Design a 128KB direct-mapped data cache that uses a 32-bit address and 16 bytes per block. Calculate the following: How many bits are used for the byte offset? Index field? And the tag? d) Three programs are concurrently executing in a multitasking computer with virtual memory pages having 16kB. Each page table entry is 32 bits. What is the minimum numbers of bytes of main memory occupied by the directory pages and page tables for the three programs, if the number of pages per program, in decimal, are as follows: 2445, 3890, and 6342