Exercise 5: The following characteristic table describes the behavior of a positive-edge triggered T flip-flop. Plot the output Q of this circuit for the given inputs shown on the timing waveform diagram. Assume that the output Q is initially reset to state 0. C T 0 1 C 0 1 A T B xx X X 0 1 Q+ Q adalo Exercise 6: Determine the PS/NS truth table, as well as the characteristic table, for the following sequential logic circuit. Q D