] Explain each of the dont cares in Figure 4.18.

Table is given in pic.

Chapter 4 The Processor Memto Reg Mem Mem- instruction! ALUSrc| Reg I write! Read I write | Branch | ALUOp? ALUOpo R-format id sd The setting of the control lines is completely determined by the opcode fields of the instructionT e corresponds to the R-format instructions (add, sub, and, and or). For all these instructions, the source register cliai he destination register field is rd; this defines how the signals ALUSrc is set. Furthermore, an R-type instruction wre PC is replaced by the branch target if the Zero output of the ALLU is also high. The ALUOp feld for R-type nstrac ate that the ALU control should be generated from the funct fields. The second and third rows of this table give the cve e d and sd. These ALUSre and ALUOp fields are set to perform the address calculation. The MemRead an memory access. Finally, RegWrite is set for a load to cause the result to be store field is irrelevant when t Thus, th the Reg wa MemtoReg ct (ALU control = 01), which is used to test for equality. Notice that the MemtoReg f register is not being written, the value of the data on the register data write port is not used the table is replaced with X for don't care. This type of don't care must be added by the designer, since it dep tapath works. Add Add Su Shift eft 1 Branch Instruction |6-0 Control AU ALUSrc Instruction [19-15 Read PC Read address Instruction 14-2register 1 Red