Question
Firstly, you are required to complete a function (ALU()) in component.c that simulates the operations of an ALU. void ALU(unsigned A, unsigned B, char ALUControl,
Firstly, you are required to complete a function (ALU()) in component.c that simulates the operations of an ALU.
void ALU(unsigned A, unsigned B, char ALUControl, unsigned *ALUresult, char *Zero)
{
if(ALUControl==0x0)*ALUresult=A+B; //add
}
ALU()
Implement the operations on input parameters A and B according to ALUControl.
Output the result to ALUresult.
Assign Zero to 1 if the result is zero; otherwise, assign 0.
The following table shows the operations of the ALU.
ALUControl | Meaning |
000 | Z = A + B |
001 | Z = A B |
010 | if A < B, Z = 1; otherwise, Z = 0 |
011 | if A < B, Z = 1; otherwise, Z = 0 (A and B are unsigned integers) |
100 | Z = A AND B |
101 | Z = A OR B |
110 | Shift B left by 16 bits |
111 | Z = NOR(A,B) |
Secondly, you are required to fill in 9 functions in component.c. Each function simulates the operations of a section of the datapath. Figure 2 in the appendix shows the datapath and the sections of the datapath you need to simulate.
In minicpu.c, the function Step() is the core function of the MiniCPU. This function invokes the 9 functions that you are required to implement to simulate the signals and data passing between the components of the datapath. Read Step() thoroughly in order to understand the signals and data passing, and implement the 9 functions.
The following shows the specifications of the 9 functions:
instruction_fetch()
Fetch the instruction addressed by PC from Mem and write it to instruction.
Return 1 if an invalid instruction is encountered; otherwise, return 0.
int instruction_fetch(unsigned PC, unsigned *Mem, unsigned *instruction)
{ *instruction=Mem[PC>>2];
return 0;
}
instruction_partition()
Partition instruction into several parts (op, r1, r2, r3, funct, offset, jsec).
Read line 41 to 47 of minicpu.c for more information.
void instruction_partition(unsigned instruction, unsigned *op, unsigned *r1, unsigned *r2, unsigned *r3, unsigned *funct, unsigned *offset, unsigned *jsec)
{
*op = instruction >> 26;
}
instruction_decode()
Decode the instruction based on opcode (op).
Assign appropriate values to the variables (control signals) in the structure controls.
The meanings of the values of the control signals:
For MemRead, MemWrite or RegWrite, the value 1 means that enabled, 0 means that disabled, 2 means dont care.
For RegDst, Jump, Branch, MemtoReg or ALUSrc, the value 0 or 1 indicates the selected path of the multiplexer; 2 means dont care.
The following table shows the meaning of the values of ALUOp.
value (binary) | Meaning |
000 | ALU will do addition or dont care |
001 | ALU will do subtraction |
010 | ALU will do set less than operation |
011 | ALU will do set less than unsigned operation |
100 | ALU will do and operation |
101 | ALU will do or operation |
110 | ALU will shift left extended_value by 16 bits |
111 | The instruction is an R-type instruction |
Return 1 if a halt condition occurs; otherwise, return 0.
int instruction_decode(unsigned op, struct_controls *controls)
{
if(op==0x0){ //R-format
controls->RegWrite = 1;
controls->RegDst = 1;
controls->ALUOp = 7;
}
else return 1; //invalid instruction
return 0;
}
read_register()
Read the registers addressed by r1 and r2 from Reg, and write the read values to data1 and data2 respectively.
void read_register(unsigned r1, unsigned r2, unsigned *Reg, unsigned *data1, unsigned *data2)
{
*data1 = Reg[r1];
*data2 = Reg[r2];
}
sign_extend()
Assign the sign-extended value of offset to extended_value.
void sign_extend(unsigned offset, unsigned *extended_value)
{
}
ALU_operations()
Based on ALUOp and funct, perform ALU operations on data1, and data2 or extended_value.
Call the function ALU() to perform the actual ALU operation.
Output the result to ALUresult.
Return 1 if a halt condition occurs; otherwise, return 0.
int ALU_operations(unsigned data1, unsigned data2, unsigned extended_value, unsigned funct, char ALUOp, char ALUSrc, unsigned *ALUresult, char *Zero)
{
switch(ALUOp){
// R-type
case 7:
// funct = 0x20 = 32, add
if (funct==0x20) ALU(data1, data2, 0x0, ALUresult, Zero);
else return 1; //invalid funct
break;
default:
return 1; //invalid ALUop
}
return 0;
}
rw_memory()
Base on the value of MemWrite or MemRead to determine memory write operation or memory read operation.
Read the content of the memory location addressed by ALUresult to memdata.
Write the value of data2 to the memory location addressed by ALUresult.
Return 1 if a halt condition occurs; otherwise, return 0.
int rw_memory(unsigned ALUresult, unsigned data2, char MemWrite, char MemRead, unsigned *memdata, unsigned *Mem)
{
if (MemRead==1){
*memdata = Mem[ALUresult>>2];
}
return 0;
}
write_register()
Write the data (ALUresult or memdata) to a register (Reg) addressed by r2 or r3.
void write_register(unsigned r2, unsigned r3, unsigned memdata, unsigned ALUresult, char RegWrite, char RegDst, char MemtoReg, unsigned *Reg)
{
Reg[r2] = memdata;
}
PC_update()
Update the program counter (PC).
void PC_update(unsigned jsec, unsigned extended_value, char Branch, char Jump, char Zero, unsigned *PC)
{
*PC+=4;
}
The file minicpu.h is the header file which contains the definition of a structure storing the control signals and the prototypes of the above functions. The functions may contain some parameters. Read minicpu.h for more information.
Notes
Some instructions may try to write to the register $zero and we assume that they are valid. However, your simulator should always keep the value of $zero 0.
You should not do any print or printf() operation in component.c;
To run the compiled executable:
In Windows, open a command prompt.
Go to your working directory.
Type: your_executable input_asc_file < incommand
Where incommand is the downloaded file. The output shows the values of all registers and memory locations, which allows you to check if your simulator can produce the correct result or not.
maybe useful:minicpu.c
#include "minicpu.h"
#include "component.c"
#define MEMSIZE (65536 >> 2)
#define REGSIZE 32
#define BUFSIZE 256
#define PCINIT 0x4000
#define SPINIT 0xFFFC
#define GPINIT 0xC000
static unsigned Mem[MEMSIZE];
static unsigned Reg[REGSIZE + 4];
#define MEM(addr) (Mem[addr >> 2])
#define PC (Reg[REGSIZE + 0])
#define Status (Reg[REGSIZE + 1])
#define LO (Reg[REGSIZE + 2])
#define HI (Reg[REGSIZE + 3])
const char RegName[REGSIZE + 4][6] = {
"$zero", "$at", "$v0", "$v1", "$a0", "$a1", "$a2", "$a3",
"$t0", "$t1", "$t2", "$t3", "$t4", "$t5", "$t6", "$t7",
"$s0", "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7",
"$t8", "$t9", "$k0", "$k1", "$gp", "$sp", "$fp", "$ra",
"$pc", "$stat", "$lo", "$hi" };
#define NREG(name) (*Nreg(name))
const char RedirNull[] = "";
const char RedirPrefix[] = ">";
static char Buf[BUFSIZE];
static int Halt = 0;
static FILE *FP;
static char *Redir = (char *) RedirNull;
/*** DATAPATH Signals ***/
// names of instruction sections
unsigned instruction;
unsigned op, // instruction [31-26]
r1, // instruction [25-21]
r2, // instruction [20-16]
r3, // instruction [15-11]
funct, // instruction [5-0]
offset, // instruction [15-0]
jsec; // instruction [25-0]
// control signals
struct_controls controls;
// Register output
unsigned data1,data2;
// sign extend
unsigned extended_value;
// ALU result
unsigned ALUresult;
char Zero;
// data read from Memory
unsigned memdata;
/******/
unsigned *Nreg(char *name)
{
int i;
for (i = 0; i < REGSIZE + 4; i++)
{
if (strcmp(name, RegName[i]) == 0)
return &Reg[i];
if (strcmp(name, RegName[i] + 1) == 0)
return &Reg[i];
}
return NULL;
}
void Init(void)
{
memset(Reg, 0, (REGSIZE + 4) * sizeof(unsigned));
NREG("pc") = PCINIT;
NREG("sp") = SPINIT;
NREG("gp") = GPINIT;
}
void DisplayControlSignals(void)
{
fprintf(stdout, "\tControl Signals: %0x%0x%0x%0x%03x%0x%0x%0x%0x ",
controls.RegDst,
controls.Jump,
controls.Branch,
controls.MemRead,
controls.MemtoReg,
controls.ALUOp,
controls.MemWrite,
controls.ALUSrc,
controls.RegWrite);
}
void Step(void)
{
/* fetch instruction from memory */
Halt = instruction_fetch(PC,Mem,&instruction);
if(!Halt)
{
/* partition the instruction */
instruction_partition(instruction,&op,&r1,&r2,&r3,&funct,&offset,&jsec);
/* instruction decode */
Halt = instruction_decode(op,&controls);
}
if(!Halt)
{
/* read_register */
read_register(r1,r2,Reg,&data1,&data2);
/* sign_extend */
sign_extend(offset,&extended_value);
/* ALU */
Halt = ALU_operations(data1,data2,extended_value,funct,controls.ALUOp,controls.ALUSrc,&ALUresult,&Zero);
}
if(!Halt)
{
/* read/write memory */
Halt = rw_memory(ALUresult,data2,controls.MemWrite,controls.MemRead,&memdata,Mem);
}
if(!Halt)
{
/* write to register */
write_register(r2,r3,memdata,ALUresult,controls.RegWrite,controls.RegDst,controls.MemtoReg,Reg);
/* PC update */
PC_update(jsec,extended_value,controls.Branch,controls.Jump,Zero,&PC);
}
}
void DumpReg(void)
{
int i;
char bb[] = " ";
for (i = 0; i < REGSIZE + 4; i++)
{
fprintf(stdout, "%s %s%s %08x%s",
(i % 4 == 0) ? Redir : "",
RegName[i], bb + strlen(RegName[i]) * sizeof(char),
Reg[i], (i % 4 == 3) ? " " : " ");
}
}
// Dump Memory Content where the addresses are in decimal format
void DumpMem(int from, int to)
{
int i, mt, ma;
(to < from) && (to = from);
if (from == to)
{
fprintf(stdout, "%s %05d %08x ", Redir, from, Mem[from]);
}
else
{
mt = Mem[ma = from];
for (i = from + 1; i <= to; i++)
{
if (i == to || Mem[i] != mt)
{
if (i == ma + 1)
fprintf(stdout, "%s %05d %08x ",
Redir, ma, mt);
else
fprintf(stdout, "%s %05d-%05d %08x ",
Redir, ma, i - 1, mt);
(i != to) && (mt = Mem[ma = i]);
}
}
}
}
// Dump Memory Content in Hex format
void DumpMemHex(int from, int to)
{
int i, mt, ma;
(to < from) && (to = from);
if (from == to)
{
fprintf(stdout, "%s %05x %08x ", Redir, from*4, Mem[from]);
}
else
{
mt = Mem[ma = from];
for (i = from + 1; i <= to; i++)
{
if (i == to || Mem[i] != mt)
{
if (i == ma + 1)
fprintf(stdout, "%s %05x %08x ",
Redir, ma*4, mt);
else
fprintf(stdout, "%s %05x-%05x %08x ",
Redir, ma*4, (i - 1)*4, mt);
(i != to) && (mt = Mem[ma = i]);
}
}
}
}
void DumpHex(int from, int to)
{
int i, j;
if (to < from)
{
for (i = from, j = 0; i >= to; i--, j++)
{
if (j % 4 == 0)
fprintf(stdout, "%s %04x ", Redir, (i << 2) + 3);
fprintf(stdout, " %08x%s", Mem[i], (j % 4 == 3) ? " " : "");
}
}
else
{
for (i = from, j = 0; i <= to; i++, j++)
{
if (j % 4 == 0)
fprintf(stdout, "%s %04x ", Redir, i << 2);
fprintf(stdout, " %08x%s", Mem[i], (j % 4 == 3) ? " " : "");
}
}
if (j % 4 != 0)
fputc(' ', stdout);
}
void Loop(void)
{
char *tp;
int sc;
Init();
for (;;)
{
fprintf(stdout, " %s cmd: ", Redir);
Buf[0] = '\0';
if (fgets(Buf, BUFSIZE, stdin) == NULL)
continue;
if ((tp = strtok(Buf, " ,.\t ")) == NULL)
continue;
fputc(' ', stdout);
switch (*tp)
{
case 'g': case 'G':
DisplayControlSignals();
break;
case 'r': case 'R':
DumpReg();
break;
case 'm': case 'M':
if ((tp = strtok(NULL, " ,.\t ")) == NULL)
{
DumpMemHex(0, MEMSIZE);
}
else
{
sc = (int) strtoul(tp, (char **) NULL, 10);
if ((tp = strtok(NULL, " ,.\t ")) == NULL)
{
DumpMemHex(sc, MEMSIZE);
}
else
{
DumpMemHex(sc, (int) strtoul(tp, (char **) NULL, 10));
}
}
break;
case 's': case 'S':
if ((tp = strtok(NULL, " ,.\t ")) == NULL)
sc = 1;
else
sc = (int) strtoul(tp, (char **) NULL, 10);
while (sc-- > 0 && !Halt)
Step();
fprintf(stdout, "%s step ", Redir);
break;
case 'c': case 'C':
while (!Halt)
Step();
fprintf(stdout, "%s cont ", Redir);
break;
case 'h': case 'H':
fprintf(stdout, "%s %s ", Redir, Halt ? "true" : "false");
break;
case 'p': case 'P':
rewind(FP);
sc = 0;
while (!feof(FP))
{
if (fgets(Buf, BUFSIZE, FP))
fprintf(stdout, "%s % 5d %s", Redir, sc++, Buf);
}
break;
case 'i': case 'I':
fprintf(stdout, "%s %d ", Redir, MEMSIZE);
break;
case 'd': case 'D':
if ((tp = strtok(NULL, " ,.\t ")) == NULL)
{
fprintf(stdout, "%s invalid cmd ", Redir);
break;
}
sc = (int) strtoul(tp, (char **) NULL, 10);
if ((tp = strtok(NULL, " ,.\t ")) == NULL)
{
fprintf(stdout, "%sinvalid cmd ", Redir);
break;
}
DumpHex(sc, (int) strtoul(tp, (char **) NULL, 10));
break;
case 'x': case 'X': case 'q': case 'Q':
fprintf(stdout, "%s quit ", Redir);
if (Redir == (char *) RedirPrefix)
{
fprintf(stdout, "%s%s ", Redir, Redir);
}
return;
default:
fprintf(stdout, "%s invalid cmd ", Redir);
break;
}
if (Redir == (char *) RedirPrefix)
{
fprintf(stdout, "%s%s ", Redir, Redir);
}
}
}
int main(int argc, char **argv)
{
int i;
unsigned long t;
//setvbuf(stdout, (char *) NULL, _IOLBF, 0);
if (argc != 2 && argc != 3)
{
fprintf(stderr, "syntax: %s input_file [-r] ", argv[0]);
return 1;
}
if (*argv[1] == '-')
{
fprintf(stderr, "syntax: %s input_file [-r] ", argv[0]);
return 1;
}
if ((FP = fopen(argv[1], "r")) == NULL)
{
fprintf(stderr, "%s: cannot open input file %s ", argv[0], argv[1]);
return 1;
}
if (argc == 3)
{
if (strcmp(argv[2], "-r") == 0)
{
Redir = (char *) RedirPrefix;
fprintf(stdout, "%s ", argv[0]);
}
else
{
fprintf(stderr, "syntax: %s input_file [-r] ", argv[0]);
return 1;
}
}
memset(Mem, 0, MEMSIZE * sizeof(unsigned));
for (i = PCINIT; !feof(FP); i += 4)
{
if (fgets(Buf, BUFSIZE, FP) == NULL)
{
if (feof(FP))
break;
fprintf(stderr, "%s: file %s reading error ", argv[0], argv[1]);
return 1;
}
if (sscanf(Buf, "%lx", &t) != 1)
{
fprintf(stderr, "%s: file %s error in line %d, continue... ",
argv[0], argv[1], i - PCINIT + 1);
MEM(i) = 0;
}
else
{
MEM(i) = strtoul(Buf, (char **) NULL, 16);
}
}
Loop();
fclose(FP);
return 0;
}
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