Flappy Bird

Project Description

Imagine that you are designing a game that requires a player to control a bird's vertical flight. Pressing the spacebar flaps the bird's wings causing it to fly higher. If the player doesn't press the spacebar within a certain amount of time, then gravity pulls the bird lower. Let's divide the screen vertically into $4$ regions: $0,1,2,3,$ with $0$ being the region closest to the ground and $3$ being the region highest in the air as illustrated below. Pressing the spacebar corresponds to an input of $1,$ and the bird flies to the next higher region. Not pressing the spacebar corresponds to an input of $0$ and the bird sinks to the next lower region.

We can indicate the region where the bird is located using two bits: Outputs O$1,$ O$0.$ During Time $1$ in the picture below, bits O$1=0$ and O$0=0$ since the bird starts in region $0$ closest to the ground. Notice how these two region bits change in the illustration below as the bird flies and sinks due to the input in the second last row.

What happens if the bird sinks below region $0?$ If the spacebar isn't pressed when the bird is already in region $0,$ it will stay in region $0$ since it can't sink any lower.

What happens if the bird flies above region $3?$ Let's change the level of the game! We can use another bit: Output O$2$ to represent transitioning to a new level in the game, starting back in region $0$ and needing to fly up to region $3$ again. We won't worry about tracking which game level we're on$.$ Rather, we'll just output when a level change occurs.

For the input sequence $1,0,0,1,1,1,0,1,1,1,$ the game outputs the sequence as shown in the last row of this illustration:

image provided below FSM Description

This simple game can be implemented as a finite state machine $($FSM$).$ For this project, you need to design the combinational and sequential logic circuit that implements this FSM$.$

OUTPUTS: O$2,$ O$1,$ O$0$

O$1,$ O$0$ represent the current state in binary, where O$0$ is the least significant bit and O$1$ is the most significant bit. For example, when the current region is $2,$ the FSM should output O$1=1$ and O$0=0.$

O$2$ represents the level change. It is $1$ only when the current state is $3$ and the input is $1.$

INPUT: In

In $=1$ increments the state. However, if the current state is $3$ then there is a level change, so wrap around to state $0.$

In $=0$ decrements the state. However, if the current state is $0$ then remain in state $0.$

Requirements

First, get a copy of this template file Download template file, which you're required to fill in to complete your design. It helps you structure your work and it helps us with grading.

Do the parts of your design in this order:

PART $1$: Design the state diagram for the FSM described above. Outputs $($O$2,$ O$1,$ O$0)$ do not need to be indicated in part $1.$

PART $2$: Fill in the truth table to correspond with the logic specified above.

PART $3$: Draw the logic circuit that implements the design.

Make sure to put a clear dot on all connections of $3$ or more incoming lines.

Note that the circuit template might have extra components that aren't needed for the design.

If you know how to simplify logic from another class, DO NOT simplify this problem.

The concepts for this project are covered during week $5,$ which includes discussing the similar example in section $3\mathrm{.}6\mathrm{.}4$ in the textbook.

State Diagram

Truth Table

Circuit

Note: Components may not be used and gates may have a single input.

Show Image TranscriptNote: Components may not be used and gates may have a single input.