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Following data is given for some MIPS implementation: 500 MHz clock 4 clock cycles for every ALU instruction. 2 clock cycles for every j/bne/beq instruction.

Following data is given for some MIPS implementation: 500 MHz clock 4 clock cycles for every ALU instruction. 2 clock cycles for every j/bne/beq instruction. 3 clock cycles for every SW. 5 clock cycles for every LW. It is also given that some program, during its execution executes 200 million ALU instructions, 55 million j/bne/beq instructions, 25 million SW and 20 million LW instructions. Find CPU execution time.

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