For the 4-bit Manchester Carry Chain, a carry is generated at the 2nd bit slice and propagated to the output node Vx. In this case, the PG signals are G4G:G2G1Go 00100, PPsP2P-1100 Assume the junction capacitance Caff (at the S and D) of each transistor is 10fF, the gate capacitance Cgate of the inverter is 20:F and the on resistance of each nMOS is 200. During the evaluation phase, how long does it take for node Vx to (4-points) (a) discharge to 50% of its initial value (VDD) (b) discharge to 10% of its initial value (VDD) P1 Ps clk For the 4-bit Manchester Carry Chain, a carry is generated at the 2nd bit slice and propagated to the output node Vx. In this case, the PG signals are G4G:G2G1Go 00100, PPsP2P-1100 Assume the junction capacitance Caff (at the S and D) of each transistor is 10fF, the gate capacitance Cgate of the inverter is 20:F and the on resistance of each nMOS is 200. During the evaluation phase, how long does it take for node Vx to (4-points) (a) discharge to 50% of its initial value (VDD) (b) discharge to 10% of its initial value (VDD) P1 Ps clk