Rectangular Snip 5.12 For the following SM chart: 0 So Z X2 1 0 Z SZ 0 0 Z X X 1 SZ 00 X (a) Draw a timing chart that shows the clock, the state (SD, S1, or S2), the inputs (X1, X2, and X3), and the outputs. The input sequence is X X2 X3 = 011,101,111,010,110,101,001. Assume that all state changes occur on the rising edge of the clock, and the inputs change between clock pulses. (b) Use the state assignment S0: AB =00; S1: AB = 01; 52: AB = 10. Derive the next state and output equations by tracing link paths. Simplify these equations using the don't care state (AB = 11). (c) Realize the chart using a PLA and D flip-flops. Give the PLA table (state transition table). (d) If a ROM is used instead of a PLA, what size ROM is required? Give the first five rows of the ROM table. Assume a nave ROM method is used (i.c., a full look-up table).