For the given sequence of word addresses show the sequence hits and misses along with the cache at each reference. The cache is fully-associative and supports 2-word block size. Assume the cache uses a LRU strategy for replacement. Assume cache is empty.

The given Cache can have up to five blocks

Word address sequence: 0, 3, 10, 1, 4, 12, 20, 21, 5, 9