For the MIPS architecture.

1. Complete the timing diagram below for the following code and pipeline attributes listed below using the specified key. All floating-point functional units are pipelined. This pipeline has forwarding available. Also state the total number of cycles used. Remember that stalls propagate through subsequent instructions. (7 points) Code: Execution Cycles for Functional Units: Line A: ADD.D F4, FO, F2 Line B: MUL.D F2, FO, F4 Integer ALU -> 1 Line C: L.D F6, 0(R1) FP Add Line D: MUL.D F4, F2, F6 FP Multiply -> 5 Line E: DIV.D F6, F2, F4 FP Divide Line F: S.D F6, 16 (R1) P->fetch: D-> decode: X-> Execution; M-> Memory; W-> Write back; s- > Stall. -> 3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 A ADD.D F4, FO, F2 B: MUL.D F2, TO, 14 CL.D F6, ORI) D MUL.D F4, F2, F6 E DIV.D TE, F2, 74 F. 3.D FE, 16 R2) Number of cycles used =